1. Field of the Invention
The present invention relates to a radio base station communications apparatus for mobile communication wherein an information signal on which signals spread with codes orthogonal to each other are code division multiplexed is communicated between a base station and a child station by a code division multi access (Code Division Multi Access, CDMA) system which uses a spread spectrum technique for radio transmission, and particularly to a dual transmission spread processing circuit system for a radio base station communications apparatus.
2. Description of the Related Art
A basic construction of a dual system for a conventional transmission spread processing section of a communication base station apparatus of the CDMA system as described above is shown in FIG. 8.
Referring to FIG. 8, in the conventional transmission spread processing section shown, two first and second transmission spread processing circuits 101a and 101b form a dual configuration and are individually connected in parallel to a channel coding processing circuit 102, a radio transmission circuit 103 and a call connection and supervision control circuit 104.
A transmission baseband signal before spread from the channel coding processing circuit 102 is inputted to the two transmission spread processing circuits 101a and 101b, in each of which it is spread modulated and addition synthesized by a spread processing circuit 105. Then, synthesis spread signals from the spread processing circuits 105 are sent to the radio transmission circuit 103. In the inside of the radio transmission circuit 103, the synthesis spread signals from the two transmission spread processing circuits 101a and 101b are added to each other by an inputting section of the radio transmission circuit 103. Then, the addition synthesis signal is inputted to a transmission circuit which performs quadrature amplitude modulation and radio frequency amplification.
The channel coding processing circuit 102 and the two transmission spread processing circuits 101a and 101b are connected to the call connection and supervision control circuit 104 by a control bus 112 so that coding processing information, spread processing information, signaling control information and so forth are communicated between them.
Subsequently, details of the internal configuration of each of the transmission spread processing circuits 101a and 101b are described.
A transmission baseband signal on which data of a plurality of channels are time division multiplexed is inputted from the channel coding processing circuit 102 to the transmission spread processing circuits 101a and 101b. In each of the transmission spread processing circuits 101a and 101b, data of the individual channels are demultiplexed from the transmission baseband signal and converted into user data having data rates defined for individual users by the channel data demultiplexing circuit 106. The spread processing circuit 105 receives the plurality of user data having the different data rates, performs spread modulation for transmission for the user data and outputs spread signals for the individual users.
An addition synthesizer 107 adds all of the spread signals for the different users to obtain a synthesis spread signal and outputs the synthesis spread signal to the radio transmission circuit 103 through a switch circuit 108. The channel data demultiplexing circuit 106, spread processing circuit 105 and switch circuit 108 are all controlled by software of a processor circuit 109. The processor circuit 109 is connected to the call connection and supervision control circuit 104 over the control bus 112 outside the transmission spread processing circuit 101a (101b) so that it may principally communicate spread process information and signaling control information with the call connection and supervision control circuit 104. Further, the processor circuit 109 receives alarm-switching information from an alarm and switching processing circuit 110 and signals it to the call connection and supervision control circuit 104 over the control bus 112.
Such a conventional dual configuration of transmission spread processing circuits as described above must have a function that, if a failure occurs with either one of the two dual transmission spread processing circuits 101a and 101b, then processing which has been performed by the transmission spread processing circuit with which the failure has occurred is compensated for by the other normal transmission spread processing circuit.
In a normal state in which none of the two transmission spread processing circuits suffers from a failure, only one of the dual transmission spread processing circuits performs processing of the dual portions of the apparatus. Thus, an element or elements of dual components which are operating are hereinafter referred to as operating system. In this instance, the operating system assumes transmission spread processing while the is in a standby state and systematically does not contribute to the transmission spread processing in the normal state. Thus, an element or elements of dual components which stand by are hereinafter referred to as standby system. In this instance, when a failure occurs with the operating system, switching to the standby system is performed. An apparatus or system of the type described is generally called set standby switching system or hot standby system.
Applying this to FIG. 8, it is assumed that the first transmission spread processing circuit 101a is the operating system and the second transmission spread processing circuit 101b is the standby system. In the normal state, all transmission spread processing as the transmission spread processing section is performed by the transmission spread processing circuit 101a of the operating system, and the transmission spread processing circuit 101b of the standby system is in a standby state and does not at all share transmission spread processing required for the apparatus then.
If a failure occurs with the transmission spread processing circuit 101a of the operating system, then this is first detected by the alarm and switching processing circuit 110 in the transmission spread processing circuit 101a, and the detection information is sent to the processor circuit 109. From the processor circuit 109, the detection information is transmitted to the call connection and supervision control circuit 104 over the control bus 112 outside the transmission spread processing circuit 101a. The call connection and supervision control circuit 104 receives the failure detection information and performs switching control to the standby system.
Here, as operation of the transmission spread processing circuit 101b of the standby system in its standby state, it is desirable from the point of view of minimization of the time of the switching process that it executes processing quite same as the transmission spread processing of the operating system but only its transmission output is stopped at the switch circuit 108 of the standby system. The switching process performed by the call connection and supervision control circuit 104 where the standby system operates in this manner is to control the switch circuit 108 in the failed transmission spread processing circuit 101a of the operating system so that the transmission output of the transmission spread processing circuit 101a is stopped and simultaneously control the switch circuit 108 of the standby system so that transmission may be performed from the transmission spread processing circuit 101b of the standby system.
Since the conventional system having such a configuration as described above performs output switching from the operating system to the standby system by hardware, restoration upon failure can be performed momentarily. However, since such a hardware configuration that the transmission spread processing circuit of the standby system must stand by while performing the quite same process as that of the transmission spread processing circuit of the operating system must be employed, as the number (unit number) of channel coding processing circuits increases in accordance with an increase of the number of channels, the number of input signal lines to the channel data demultiplexing circuit 106 of each of the transmission spread processing circuits increases. This complicates the circuit configuration of the channel data demultiplexing circuit 106 and gives rise to an increase in scale and an increase in production cost.
This is described more specifically with reference to FIG. 9 which shows a transmission spread processing section including six channel coding processing circuits 102. Referring to FIG. 9, the channel coding processing circuits 102 are mounted separately from one another on separate printed circuit boards such that they form separate units each in the form of a panel. Each unit receives and multiplexes a plurality of input signals and outputs a single transmission baseband signal to the transmission spread processing circuits 101a and 101b. In this instance, the bit rate and so forth of the input signals are controlled through the control bus 112.
Accordingly, the number of input signal lines inputted to the channel data demultiplexing circuit 106 of each of the transmission spread processing circuits 101a and 101b is 6, and as the number of such input signal lines increases, the circuit configuration of the signal inputting section of the channel data demultiplexing circuit 106 is complicated and increases in scale.
It is an object of the present invention to provide a dual transmission spread processing circuit system for a radio base station communications apparatus which is simplified in circuit configuration and can be produced in a reduced size and at a reduced.
It is another object of the present invention to provide a dual transmission spread processing circuit system for a radio base station communications apparatus by which switching after occurrence of a failure till restoration can be performed momentarily.
It is to be noted that the term xe2x80x9cfailurexe2x80x9d in the present specification is used to signify a broad concept including any fault or abnormal state in which an apparatus does not operate normally.
In order to attain the objects described above, according to an aspect of the present invention, there is provided a dual transmission spread processing circuit system for a CDMA communication apparatus, comprising dual transmission spread processing circuits each including a spread processing section for spread modulating transmission data of a plurality of channels, an addition synthesis section for addition synthesizing a plurality of spread signals processed by the spread processing section, an output selection section for selecting whether or not a synthetic spread signal of the addition synthetic section should be outputted, a failure detection section for detecting a failure, and a control section, the spread processing section of each of the transmission spread processing circuits including two sections of an operating system spread processing section and a standby system spread processing section, the addition synthesis section addition synthesizing spread signals processed by the operating and standby system spread processing sections separately from each other, each of the transmission spread processing circuits including an addition selection section for selecting whether or not the operating system spread signal and the standby system spread signal should be addition synthesized, the addition selection section being controlled with a failure detection signal from the failure detection section of the other one of the dual transmission spread processing circuits.
Each of the transmission spread processing circuits may include a control selection section for selecting whether the addition selection section should be controlled immediately or through the control section when a failure detection signal is received from the failure detection section of the other one of the transmission spread processing circuits. When the addition selection section should be controlled through the control section, the addition selection section may be changed over to the addition side at a designated timing in a radio frame. This allows arbitrary selection between a momentary switching operation and a synchronous switching operation wherein switching is performed at a designated timing of a radio frame.
The output selection section may be controlled by that one of the control sections which receives the failure detection signal from the failure detection section.
The addition synthesis section of each of the transmission spread processing circuits may include a first addition synthesis section for adding a plurality of spread signals processed by the operating system spread processing section, a second addition synthesis section for adding a plurality of spread signals processed by the standby system spread processing section, and a third addition synthesis section for addition synthesizing synthetic spread signals of the first and second addition synthesis sections.
Each of the failure detection sections may detect a failure of the control section as well. This promotes the effects of the dual system.
Each of the transmission spread processing circuits may include a channel data demultiplexing section for receiving a transmission baseband signal on which data of a plurality of channels are time division multiplexed from a channel coding processing circuit, demultiplexing the transmission baseband signal into data of the individual channels and converting the data of the individual channels into data corresponding to data rates for individual users, and outputs of the channel data demultiplexing section may be inputted to both of the operating system spread processing section and the standby system spread processing section. Where a plurality of channel coding circuits are provided and grouped corresponding to the dual transmission spread processing circuits, the channel data demultiplexing section of each of the transmission spread processing circuits may receive transmission baseband signals from the channel coding processing circuits of the corresponding group. The control section may receive the failure detection signal from the fault detection section of the other one of the dual transmission spread processing circuits and controls the channel coding processing circuits over a control bus.
In the dual transmission spread processing circuit system for a CDMA communication apparatus described above, the spread transmission circuit in each of the transmission spread processing circuits is divided into an operating system spread processing section and a standby system processing section, and normally. Spread signals from the operating system spread transmission circuits of both of the spread processing circuits are extracted while each of the standby system spread processing circuits of the spread processing circuits performs the same processing as that of the operating system of the other side spread processing circuit but outputting from the standby system spread processing circuit is stopped. Then, when a failure occurs, the normal side system is controlled directly with failure detection information from the failed side transmission spread processing circuit to switch so that spread signals are extracted from the operating system spread processing section and the standby system spread processing section of the spread processing circuit of the normal side. Accordingly, since a spread signal output allocated as the standby system can be controlled so as to be signaled momentarily by hardware by each of the transmission spread processing circuits, switching after occurrence of a failure till recovery can be performed momentarily by hardware means, and miniaturization and reduction of the cost of the apparatus are achieved.
According to another aspect of the present invention, a dual transmission spread processing circuit system for a CDMA communication apparatus is constructed such that the two dual transmission spread processing circuits are both used in a normal state, but if a failure occurs with one of them, then the normal one of them performs all of the processing which has been performed by the two transmission spread processing circuits. In this instance, also during failure of one of the transmission spread processing circuits, all of the transmission spread processing must naturally be performed by an amount and at a rate equal to those before the failure occurs. Thus, the sum total of the transmission spread processing amounts processed by the two transmission spread processing circuits must always be suppressed equal to or lower than the transmission spread processing capacity of each of the transmission spread processing circuits.
Thus, according to the second aspect of the present invention, there is provided a dual transmission spread processing circuit system for a CDMA communication apparatus, comprising dual transmission spread processing circuits each including a channel data demultiplexing section for receiving a transmission baseband signal on which data of a plurality of channels are time division multiplexed from a channel coding processing circuit, demultiplexing the transmission baseband signal into data of the individual channels and converting the data of the individual channels into data corresponding to data rates for individual users, a spread processing section for spread modulating the transmission data of the plurality of channels processed by the channel data demultiplexing section, an addition synthesis section for addition synthesizing a plurality of spread signals processed by the spread processing section, an output selection section for selecting whether or not a synthetic spread signal of the addition synthetic section should be outputted, a failure detection section for detecting a failure, and a control section, a plurality of channel coding processing circuits being provided and grouped corresponding to the dual transmission spread processing circuits, the channel data demultiplexing section of each of the transmission spread processing circuits receiving transmission baseband signals from the channel coding processing circuits of the corresponding group, the channel coding processing circuits of the two groups being connected to each other by bypass routes, the channel coding processing circuits of each of the groups being connected to the control section and a call connection and supervision section over a control bus, and the call connection and supervision section controlling, when the failure detection section of one of the transmission spread processing circuits with which a failure has occurred detects the failure and issues a notification of the failure to the call connection and supervision section over the control bus, the channel coding processing circuits of the two groups so that processing by the plurality of channel coding processing circuits of the failed side group is transferred to the plurality of channel coding processing circuits of the normal side group.
In the dual transmission spread processing circuit system for a CDMA communication apparatus, the plurality of channel coding processing circuits are divided into groups corresponding to the dual transmission spread processing circuits, and the two groups of channel coding processing circuits are connected to each other by the bypassing routes. If some failure occurs, then processing by the plurality of channel coding processing circuits of the abnormal side group is transferred to the plurality of channel coding processing circuits of the normal side group. Consequently, although the switching time after occurrence of a fault till restoration is longer than that by the dual transmission spread processing circuit system for a CDMA communication apparatus according to the first aspect of the present invention described above, miniaturization and reduction in cost of the apparatus can be achieved.
The above and other objects, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements are denoted by like reference symbols.